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Hmm... yes, really.

Probably, lv1_mm == lv1_memory_management?

Does hypercall know about its index in the interrupt table? Can that table contain one pointer many times?

If no, that picture is just blue-white-black paintwork.

It is "hv call table" from geohot: http://2.bp.blogspot.com/_NJ4JFBfr1tY/S1ufqZiXH8I/AAAAAAAAAbY/k2qztNwQhy4/s1600-h/hvcalls.PNG compare with http://wiki.ps2dev.org/ps3:hypervisor The only difference i can note - many hv calls are copies of lv1_allocate_memory (it is new fact and can be ea...

Cool :). DMA from stack.

Yes, nice error.

Hmm... Probably you need the following code

while( !spu_stat_signal1( ) );
spu_read_signal1( );

I used memory chunk allocated by lv1_allocate_memory( 1 << 20, 20, 0, 0x04, &xdr_lpar, &muid ); The function lv1_gpu_context_iomap( context.handle, 0, xdr_lpar, 1 << 20, 0 ) returns 0. But RSX failed to write/read that memory. Why? lv1_gpu_context_iomap( context.handle, 0, xdr_frame_buffer, ...

I have no ideas about PS2 inside my PS3. Really no ideas :).

Anyhow, it is interesting to test this code ( giving 6+ free MiBs to Linux ): #define PAGE_SHIFT_1M 20 r->size = _ALIGN_DOWN&#40;size, 1 << PAGE_SHIFT_1M&#41;; result = lv1_allocate_memory&#40;r->size, PAGE_SHIFT_1M, 0, ALLOCATE_MEMORY_TRY_ALT_UNIT, &r->base, &muid&#41;; Othe...

That code allocates memory on PS3: ** * ps3_mm_region_create - create a memory region in the vas * @r&#58; pointer to a struct mem_region to accept initialized values * @size&#58; requested region size * * This implementation creates the region with the vas large page size. * @size is rounde...

It seem like these function perfom TILES & ZCULL setup.

First parameters of these functions change from 0 to number of color & depth tiles ( params of lv1_gpu_memory_allocate ).

On my FW ( 1.9 ) hypervisor created two logical partitions, 128 and 112 MiBs.

So 240 MiBs are accessible by the linux kernel.

This page http://www.ps3news.com/tag/bootup says how the boot proccess looks like. The SCC (Super Companion Chip), made by Toshiba gets the PS3 started up. It reads asecure_loader from flash, and loads it into SPE in isolation mode. The Flash reading is interesting, as the data on the flash chips ar...

I used some code to probe lv1_gpu_context_attribute subfunctions with LV1_ILLEGAL_PARAMETER_VALUE return value; Refer http://wiki.ps2dev.org/ps3:hypervisor:lv1_gpu_context_attribute u64 tbl&#91;&#93; = &#123; xdr_lpar, 0x200, 0x201, 0x100, 0x101, 0x102, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, ...

I have an idea about possible test. there is lv1_gpu_open function with 1 parameter. There is lv1_gpu_device_map function and LV1_ILLEGAL_PARAMETER_VALUE return code for device 0 and 4. http://wiki.ps2dev.org/ps3:hypervisor:lv1_gpu_device_map Can somebody test for&#40; int i = 0; i < 64; ++i &am...

As far as I know NVidia uses bit-mixing for u, v. So odd bits are taken from u, even from v. This code ( untested ) must work. typedef struct Tex &#123; uint8_t pixs&#91;128 * 128&#93;&#91;4&#93;; &#125;; uint8_t *GetPixel&#40; struct Tex *tex, int i, int j &#41; &...

Vote for #2

try <altivec.h> include.

>So if you don't use the Cell "properly" you will be *very* disappointed :)

Yes, that is the point.

Use PPU as IO-processor and SPU scheduler only.

> still don't understand. If the CPU writes directly to video ram through a pointer, it's 10MB/sec It is better to try SPU-initiated DMAs for VRAM writes. I'm not sure about exact numbers, need to retest. But I think that 5GiB/s is possible to achieve. High VRAM write rate is very usable for resourc...

Now you do not need to modify kernel sources.

Init kernel module is integrated into libps3rsx package. Just run cd src/init && ./startup.sh
from libps3rsx root.

VRAM writes by CPU are fast ( GiBs/s for DMA ). Readings are slow ( MiBs/s ).

>Having the CPU write directly to VRAM would be incredibly slow. Writes are fast. DMA writes are at ~5 GB/s I think. XDR frame buffer is allocated at system startup. By default ps3fb allocates 9 megs for 1080i frame buffer. You can change that value to 4-5 MiBs if you do not want to use HD resolutio...

There is simple 3D API with vertex/index buffer support, texture support, shader compiler: svn co svn://svn.ps2dev.org/ps3ware/trunk/libps3rsx libps3rsx I do not know any difference between NV40 and RSX. I think that it is easy to port Nouveau high-level stuff. Just recompile it. The main problem is...

3D access under Linux is blocked under fw 2.1.

At least I do not know how to run 3D.

Video memory is persistent after cold boot. In fw < 2.1 at least.

>The Linux partition is not encrypted

Thanks, I did not know.

As far as I know it is possible to plug your SATA HDD into PS3. HDD is encrypted ( encryption on reserved SPU ), so all DMAs are perfomed by HV. Probably, it is possible to extend XDR memory. Devkits have 512 MiBs of XDR memory ( it is open info, you can google it ). Probably devkits and retail cons...

>Some trial code I've done in 32 bit mode runs in a rather random extent : some DMA transfers between ppe ram and spe local store work, while some don't (infinite process hangup, needs to be killed by SIGINT). Transfer pointers from PPE to SPE as unsigned __int32. dma_put(get) will take correct unsi...

I commited

1.) Blending support
2.) float16 support
3.) new FX demo.

This demo renders animated particles on SPU. All particle params ( position, size, color, orientation ) were exported from Maya DCC tool and saved as animation tracks.

Code is not very clean and needs to be refactored.

You can refer this code ( tools/toolgeometry/colladatool.cpp ) about model packing. http://www.everfall.com/paste/id.php?wlf5ol18m6fq You can also setup vertex streams by hands with: with typedef enum { EMPTY=0x0, FLOAT=0x2, UBYTE=0x4, SHORT=0x5 } geom_format_t; typedef enum { POS0 = 0x0, WGHT = 0x1...

band is fixed with double buffering.

I do not understand why rendering with single buffering produces screen corruption.